Shanghai, China, May 7, 2025- Cadence Electronics (NASDAQ: CDNS) recently announced the launch of its first DDR5 12.8Gbps MRDIMM Gen2 memory IP solution based on TSMC's N3 technology. This new solution can meet the industry's demand for larger memory bandwidth and adapt to cutting-edge AI processing needs in enterprise and data center applications, including cloud AI. Cadence? The DDR5 MRDIMM IP is based on Cadence's validated and highly successful DDR5 and GDDR6 product lines, featuring a new scalable and adjustable high-performance architecture. This IP solution has established partnerships with multiple leading clients in the fields of artificial intelligence, high-performance computing, and data centers, and continues to deepen its expertise in technological innovation. The new Cadence DDR5 IP provides a PHY and a high-performance controller as a complete memory subsystem. This design has been validated on hardware using the latest MRDIMM (Gen2) and can achieve an excellent 12.8Gbps data rate, doubling the bandwidth compared to using existing DDR5 6400Mbps DRAM components. The DDR5 IP memory subsystem is based on Cadence's silicon validated high-performance architecture, ultra-low latency encryption, and industry-leading RAS functionality. The DDR5 MRDIMM Gen2 IP is designed to enable advanced SoCs and chiplets with flexible layout design options, while the new architecture allows for fine tuning of power consumption and performance based on individual application requirements. Praveen Vaidyanathan, Vice President and General Manager of Data Center Products at Micron, said, "The Cadence DDR5 IP product portfolio, combined with Micron's industry ideal 1 gamma based DRAM, can meet the rapidly growing demand for higher memory bandwidth, storage density, and reliability in AI processing workloads. The breakthrough advancements in these memory technologies are of crucial importance in empowering next-generation AI/ML and HPC applications in data centers and enterprise environments. ”. Cadence's DDR5 MRDIMM IP system solution, combined with MRDIMM modules with Montage memory buffering, provides a high-performance memory subsystem with twice the bandwidth for the new generation of servers, "said Stephen Tai, President of Montage Technology." Montage's MRCD02/MDB02 chip for MRDIMM can achieve a data rate of 12.8Gbps, which can well support server and data center products. By utilizing Cadence's DDR5 12.8Gbps MRDIMM IP system solution, data centers and enterprise applications can achieve significant performance advantages, as evidenced by the adoption of Cadence's innovative technology by numerous large customers, "said Boyd Phelps, Senior Vice President and General Manager of the Chip Solutions Division at Cadence." While improving standards, the newly launched advanced memory IP system also establishes a roadmap, providing continuous support for our customers' next-generation SoC and chiplet products. Cadence's DDR5 controller and PHY have undergone DDR verification through Cadence's Verification IP (VIP), which provides fast IP and SoC verification sign off. Cadence VIP for DDR5 includes a complete solution, from IP to system level validation and DFI VIP, DDR5 memory model, and system performance analyzer. For more information about this new solution, please visit the Cadence DDR5 MRDIMM PHY and Controller page.This is reported by Top Components, a leading supplier of electronic components in the semiconductor industry

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